fuzzibear ([info]fuzzibear) wrote,
@ 2006-08-17 13:34:00
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Something I Took Note But Forgot To Upload Them|
tk/sysdepend/tc1130/asm_depend.h

- supposed to define the asm function when entering & returning from interrupts.

- however, TriCore has a special function that once u set-it-up, will take care of it autmatically. that is why the function only contain the disable command.

- ok, i found the code where mohit initialise the tricore to allow auto-contextsaving, but TK also need to allow exception handling. So if this automatically done when i initialise the tricore for interrupts?

- found out that task exception handlers have not been implemented in the TC1775. TEH are kindof 'error-handling' for each task. You can only have one TEH per task.

- "dbgspt_depend.h", mohit only defined pcxi. what about psw and other registers? is psw ignored because it is handled by 'auto-high-context-save'? what about procedure register (PR)? isnt it needed?

- in cpu_support.S, isync & dsync is used. I think it is used because MTCR are being utilised.


- I intend to use Mohit's TC1775 interrupt table as a basis.
- Firstly I highlight the ASCX (simplest to edit) & GPTU (needed to be removed)
- TC1130 has 3 ASC, so i decided to assigned one at the lowest, mid-range & highest priority.
- CPU interrupt is left at 1 (as recommended by Mohit) [lowest priority] ** why is it arranged as 0-2-1-3?? **
- GPTU 0-1-7-6-2-3-4-5????
- i included the 9 interrupt for ethernet. it seems they have 2 pairs of (tx/rx) interrupt. and 3 int for controlling the other aspect. i am unsure what priority i should place for these 3 INT.



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